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8.4.3.2 Destination data end pointer
The dst_data_end_ptr memory location contains a pointer to the end address of the destination data.
Table 8.8 (p. 53) lists the bit assignments for this memory location.
Table 8.8. dst_data_end_ptr bit assignments
Bit
[31:0]
Name
dst_data_end_ptr
Description
Pointer to the end address of the destination data
address of the destination data. The controller reads this memory location when it starts a 2 DMA
Before the controller can perform a DMA transfer, you must program this memory location with the end
R
transfer.
Note
The controller does not write to this memory location.
8.4.3.3 Control data configuration
For each DMA transfer, the channel_cfg memory location provides the control information for the
controller. Figure 8.8 (p. 53) shows the bit assignments for this memory location.
Figure 8.8. channel_cfg bit assignments
31 30 29 28 27 26 25 24 23
21 20
18 17
14 13
4 3 2
0
R_power
src_prot_ctrl
n_m inus_1
cycle_ctrl
dst_inc
src_inc
dst_prot_ctrl
next_useburst
dst_size
src_size
Table 8.9 (p. 53) lists the bit assignments for this memory location.
Table 8.9. channel_cfg bit assignments
Bit
[31:30]
[29:28]
Name
dst_inc
dst_size
Description
Destination address increment.
The address increment depends on the source data width as follows:
Source data width = byte
b00 = byte.
b01 = halfword.
b10 = word.
b11 = no increment. Address remains set to the value that
the dst_data_end_ptr memory location contains.
Source data width = halfword
b00 = reserved.
b01 = halfword.
b10 = word.
b11 = no increment. Address remains set to the value that
the dst_data_end_ptr memory location contains.
Source data width = word
b00 = reserved.
b01 = reserved.
b10 = word.
b11 = no increment. Address remains set to the value that
the dst_data_end_ptr memory location contains.
Destination data size.
2011-04-12 - d0001_Rev1.10
53
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